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  [AK1291] if variable gain amplifier with rssi AK1291 1. overview 1. overview AK1291 is a variable gain amplifier with a power detector. it?s operating frequency ranges from 100mhz to 300mhz. the gain control adopts an analog signal control, and the gain characteristic is db linear. the gain control range is -9db to +21db and a dynamic range is 30db. AK1291 has single-ended input and output, with impedance of 50 ? . as a typical characteristic, nf is 7db (at maximum gain) , and imd3 is 70dbc at output power of -15dbm ,a t frequency of 165mhz.the power supply voltage is 4.75v to 5.25v . 2. feature ? operation frequency range 100mhz to 300mhz ? gain variable range -9db to 21db ? noise figure 7db @max gain ?imd3 70dbc @output power -15dbm ? supply voltage 4.75v to 5.25v ? operating temperature -40c to +85c ? package 24pin qfn0404 3. block diagram rfinp rfinn gcon pvdd oavd iavdd vss3 enab bias com rfout buffer detector detin detout detvdd vss1 vss2 vss4 vss6 vss5 fig 1. block diagram ms-e-1148-00 2012/11 - 1 -
[AK1291] content 1. overview ................................................................................................................. 1 2. feature ..................................................................................................................... 1 3. block diagram ........................................................................................................ 1 4. pin configuration .................................................................................................... 3 5. pin function description .......................................................................................... 4 6. maximum absolute rating ..................................................................................... 5 7. recommended operational condition ...................................................................... 5 8. electrical characteristic ........................................................................................... 6 9. interface circuit ........................................................................................................ 8 10. evaluation board schimatic .................................................................................. 10 11. typical performance ............................................................................................. 11 12. marking ................................................................................................................. 13 13. outer dimensions .................................................................................................. 14 ms-e-1148-00 2012/11 - 2 -
[AK1291] 4. pin configuration top view rfinp rfinn gcon pvdd vss4 com vss1 enab bias test2 test1 vss5 test5 detou 7 8 9 10 1 2 3 4 5 6 18 17 16 15 14 13 11 12 24 23 22 21 20 19 vss2 test3 test4 detin detvd rfout vss3 oavdd iavdd vss6 fig 2 pin configuration 5. block function block function vga variable gain amplifier which is controlled by the vo ltage of 0.2 to 2.5v power detector power detector which detect power level of vga output ms-e-1148-00 2012/11 - 3 -
[AK1291] 6. pin function description table 1. pin function pin no name i/o function remark 1 vss1 g ground 2 rfinp ai rf input positive 3 rfinn ai rf input negative 4 pvdd p power supply 5 gcon ai control voltage input 6 vss2 g ground 7 bias aio resistance connection pin for current adjustment no resistance is connected. 8 enab di power down control enab=?high? power on enab=?low? power down 9 test1 di test pin connect to ground 10 test2 di test pin connect to ground 11 test3 di test pin connect to ground 12 test4 di test pin connect to ground 13 test5 do test pin connectionless 14 detout ao detector output connect a capacitor of 10pf to ground 15 detin ai detector input connect a resistor of 50 ? to ground 16 detvdd p power supply 17 rfout ao rf output 18 vss3 g ground 19 vss4 g ground 20 oavdd p power supply 21 vss5 g ground 22 iavdd: p power supply 23 com aio pin for input common voltage connect a capacitor of 10nf to ground 24 vss6 g ground 25 expad g ground the exposed pad at the center of the backside should be connected to ground. note) the exposed pad at the center of the backside should be connected to ground. ai:analog input pin ao:analog output pin di: digital input pin do digital output pin p: power supply pin g: ground pin about power down control: the power down of the whole ic is done by enab (pin8). in the case that enab is high , vga block and detector block are power on state. in the case that let only detector block power down, connect detvdd to the ground. ms-e-1148-00 2012/11 - 4 -
[AK1291] 7. absolute maximum rating table 2. absolute maximum rating ? ? min. max. g q supply voltage vdd -0.3 5.5 v applied to [pvdd] [iavdd] [oavdd] [detvdd] note1) ground level vss 0 0 v applied to [vss1] [vss2] [vss3] [vss4] [vss5] [vss6] and [expad] analog input voltage vain -0.3 vdd+0.3 v applied to [rfinp] [rfinn] [gcon] and [detin] vdin -0.3 vdd+0.3 v applied to [enab] note1) rfinp/rfinn maximum input level pmax +10 dbm storage temperature tstg -55 125 c note1) all voltage reference ground level: 0v exceeding these maximum ratings may result in damage to the AK1291. normal operation is not guaranteed at these extremes 8. recommended operational condition table 3. recommended operational condition ? ? min. typ. max. g q operating temperature ta -40 85 c supply voltage vdd 4.75 5 5.25 v applied to [pvdd] [iavdd] [oavdd] and [detvdd] each specification is applied in the power supp ly voltage and the operating temperature applied to recommended operational condition. ms-e-1148-00 2012/11 - 5 -
[AK1291] 9. electrical characteristic dc characteristic item symbol condition min. typ. max. unit high level input voltage vih note1) 0.8*vdd v low level input voltage vil note1) 0.0 0.2*vdd v input leak current iil note1) -10 10 a current consumption 1 icc1 pvdd=oavdd=iavdd= detvdd=vdd enab=high 155 199 ma current consumption 2 icc2 pvdd=oavdd=iavdd vdd detvdd=vss enab=high 151 195 ma current consumption 3 icc3 pvdd=oavdd=iavdd vdd detvdd=vss enab=low 10 a note1) applied to [enab] pin ac characteristic pvdd=oavdd=iavdd=4.75v 5.25v, ta=-40c 85c f 0 =165mhz, unless otherwise specified item symbol condition min. typ. max. unit vga block input frequency f op 100 300 mhz input impedance i imp 50 output impedance o imp 50 gain control range g cont 30 db max. gain g max gcon=2.5v 21 db min. gain g min gcon=0.2v -6.5 db gain 1 ga1 gcon=2v 21 db gain 2 ga2 gcon =0.5v -9 db gain control voltage range v gt 0.2 2.5 v gain curve slope note1) g cs 0.5v Qvgcont Q 2.0v 1 20 80 db/v gain step response g sr 5 s noise figure note2) nf gain = 21 db 7 db output p1db op1 5 dbm imd3 imd3 output level = -15dbm 65 70 dbc noise figure note2) nf gain = 21 db 7 db output p1db op1 5 dbm imd3 imd3 output level = -15dbm 65 70 dbc noise figure note2) nf gain = 21 db 7 db output p1db op1 5 dbm imd3 imd3 output level = -15dbm 55 60 dbc ms-e-1148-00 2012/11 - 6 -
[AK1291] detector block input frequency range f op 100 500 mhz output voltage level 1 det_h detin=-15dbm 1.6 2.2 v output voltage level 2 det_h detin=-35dbm 0.5 0.9 v temperature dependency note 2) detvdev refer to 25c 1 db note1) guaranteed monotonicity note2) guaranteed by design ms-e-1148-00 2012/11 - 7 -
[AK1291] 10. interface circuit pin no pin name i/o interface circuit 2 rfinp 3 rfinn i rf input 5 gcon i analog input 300 7 bias 23 com i/o analog input/output 300 17 rfout o rf output ms-e-1148-00 2012/11 - 8 -
[AK1291] pin no. pin name i/o interface circuit 8 enab 9 test1 10 test2 11 test3 12 test4 i digital input pull-down 300 100k 13 test5 o digital output 14 detout o output 300 15 detin i rf input ms-e-1148-00 2012/11 - 9 -
[AK1291] 11. evaluation board schimatic rfinp rfinn gcon pvdd vss4 com vss1 enab bias test2 test1 vss5 test 5 detout vss2 test3 test4 detin detvdd o avd iavd vss6 rfout vss3 vdd vdd vdd vdd gain control iinput ioutput detector input detector output 1nf 0.1uf 1nf 0.1uf 1nf 10nf 10nf 1nf 0.1uf 1nf 0.1uf 10nf 10nf 51 10pf fig 3. typical eval uation board schimatic ms-e-1148-00 2012/11 - 10 -
[AK1291] 12. typical performance unless otherwise noted, pvdd=oavdd=iavdd=detvdd=5v, ta=25 , freq=165mhz 1. gain vs analog controll voltage fig.4-1 gain vs control voltage(fo=100mhz) fig.4-1 gain vs control voltage(fo=165mhz) fig.4-1 gain vs control voltage(fo=300mhz) ms-e-1148-00 2012/11 - 11 -
[AK1291] 2. noise figure fig.5-1 nf vs gain (temp =25c) fig.5-2 nf vs gain (fo=165mhz) 3. imd3 fig.6-1 imd3 vs gain (temp =25c) fig.6-2 imd3 vs gain (fo=165mhz) ms-e-1148-00 2012/11 - 12 -
[AK1291] 13. marking (a) style : qfn (b) number of pins : 24 (c) 1 pin marking: (d) product number : 1291 (e) date code : ywwl (4 digits) y: lower 1 digit of calendar year (year 2013 3, 2014 4 ...) ww: week l: lot identification, given to each product lot which is made in a week lot id is given in alphabetical order (a, b, c?). 1291 (d) ywwl (e) (c) ms-e-1148-00 2012/11 - 13 -
[AK1291] 14. outer dimensions hwqfn24-44-0.5 note) the exposed pad at the center of the backside should be connected to ground. ms-e-1148-00 2012/11 - 14 -
[AK1291] important notice z descriptions of external circuits, application circuits, software and other related information contained in this document are provided only to illu strate the operation and application examples of the semiconductor products. you are fully responsible for the incorporation of these external circuits, application circuits, software and other related information in the design of your equipments. asahi kasei microdevices corporation (akm) assumes no re sponsibility for any losses incurred by you or third parties arising from the use of these information herein. akm assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of such information contained herein. z any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. z akm products are neither intended nor authorized for use as critical components note1) in any safety, life support, or other hazar d related device or system note2) , and akm assumes no responsibility for such use, except for the use approved with the e xpress written consent by representative director of akm. as used here: note1) a critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of perfo rmance and reliability. note2) a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medi cine, aerospace, nuclear energy, or ot her fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. z it is the responsibility of the buyer or distributor of akm products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold akm harmless from any and all claims arising from the use of said product in the absence of such notification. ms-e-1148-00 2012/11 - 15 -


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